The short version: plugging thermal vias is not a question of filling them as completely as possible. It is a risk allocation decision. Open vias leave the risk at assembly, where molten solder wicks into the barrels. Resin plugging with plated capping moves the risk into fabrication, where the via mouth has to be ground and plated flat. Conductive paste filling concentrates the risk in filler material and via-mouth consistency. All three routes produce usable boards. They fail in completely different ways, and the drawing has to state which one you chose.
1. One structure, two demands that do not compromise
There is only one reason to draw that cluster of vias under a power device: to move heat from under the die down to the back copper, a metal base, or an external heatsink. It is a vertical heat path, and the more barrels you have with continuous plating, the better that path conducts.
The complication is where that cluster sits. It is not a blank copper area, it is the device thermal pad — an interface that has to complete a solder joint during reflow. So one structure now carries two requirements:
- As a heat path, it wants to be a set of copper tubes open all the way through.
- As a solder interface, it wants to be a flat, continuous, non-leaking surface.
Those requirements contradict each other by construction. An open barrel leaks. A flat surface means the mouth has been closed by something. Choosing a thermal via process is therefore choosing which failure mode you can live with.
A common mistake is to treat this array as a denser version of ordinary electrical vias. An electrical via only needs continuity; whether solder entered the barrel and whether the mouth is flat do not matter. A via under a thermal pad is different — it directly governs solder joint geometry and voiding. Once the joint is starved, the first segment of the heat path (die to pad) is the segment that breaks. An excellent heat path below a broken first segment is worth nothing.
2. Three routes, and who inherits the risk
| Route | Final state of the via | Risk moves to | Typical failure mode |
|---|---|---|---|
| Open (no fill) | Plated barrel, hollow, both ends open | Assembly (reflow) | Solder wicks down the barrel; starved joint under the pad, larger voids, solder beads on the back side |
| Resin plug + plated cap | Resin inside, mouth closed with copper and merged into the pad | Fabrication (plugging, grinding, second plating) | Mouth dimple or protrusion beyond the acceptable range, voids between resin and barrel wall, discontinuity where cap copper meets barrel copper |
| Conductive paste fill | Conductive filler inside, mouth finished flush with the pad | Material and via-mouth consistency | Incomplete fill, uneven fill height across the array, discontinuous filler-to-barrel interface |
Do not read this table as a ranking. Read it as where you would rather have your problems appear.
Open vias are the cheapest in process terms; they add no operations at all. The price is handing an uncontrolled variable to assembly, because a plated barrel is a capillary and molten solder gets pulled into it. Resin plugging has its own complete acceptance framework, but it buys that at the cost of several added fabrication steps — plug after drilling, cure, grind, plate again — each with its own process window. Conductive paste filling looks like it satisfies both sides, but it rests on material batch behaviour and via-mouth machining consistency: a handful of vias at a different fill height means the solder interface is no longer a plane.
One point that gets confused constantly: the resin inside a plugged via does not conduct the heat. On that route, conduction still happens through the plated barrel wall and the copper cap over the mouth. Resin fills the hole so the mouth can be plated flat. Treating "we plugged it with resin, so it conducts better" as a design rationale does not hold.
3. Why solder leaves: the real cost of open vias
Put open vias under a thermal pad and reflow produces a predictable physical sequence. Solder paste becomes liquid and mobile, the plated through hole is a capillary open at both ends, and molten solder is drawn down the barrel wall. It can emerge at the back side opening.
The consequences chain together:
- Less solder volume under the pad. The layer between device and pad thins out or develops large voids, so the first hop from die to pad gets worse, not better.
- The device can tilt. Wicking is never perfectly uniform across the array. The side that draws more solder is the side the device settles toward while the joint is liquid.
- Solder beads on the back side. If the back is also an assembly surface, or has to mate flat against a heatsink, those beads destroy the contact.
- The result is unstable. How much solder wicks depends on paste volume, oven profile and barrel capillary conditions, all of which shift between batches. The same design can behave differently on two lines.
So "thermal vias work fine unfilled" is true under exactly one condition: assembly knows the vias are open and has adjusted paste volume, stencil aperture and reflow profile accordingly. If the drawing never said so and assembly processed the board conventionally, the four items above occur as a matter of probability. That is an information handoff failure between process steps, not a capability failure.
There is also a widely used middle path: leave the vias unfilled but tent the back side opening with solder mask, sealing one end of the capillary. This substantially reduces solder escaping to the back. The costs are that the barrel remains hollow, the back side is no longer suitable for heatsink contact, and whether solder mask can fully close the mouth depends directly on hole size — confirm that with the fabricator rather than assuming it.
4. Choose plugging, and the question becomes whether the mouth is flat
Resin plugging with a plated cap has a clear goal: return the thermal pad to a continuous plane while keeping the copper barrel as the heat path. Getting there means fabrication executes several steps in order — fill the barrel with resin leaving no voids, cure, grind flush with the panel surface, then plate so the mouth closes into copper and merges with the pad.
What the designer actually needs to understand is how this route fails:
- Mouth dimple or protrusion. After grinding and plating, the mouth is never perfectly level with the pad; a small dimple or bump always remains. Inside the acceptable range it is a non-issue. Beyond it, it becomes a localized void or a fulcrum during soldering. This is the controlled characteristic of the route.
- Voids between resin and barrel wall. Incomplete fill leaves gaps that become crack initiation sites under thermal cycling and that trap process chemistry during plating and cleaning.
- Discontinuity where cap copper meets barrel copper. This is an interface between two plating operations, and the most commonly overlooked segment of the whole heat path.
All of these belong to the acceptance scope of resin plugging itself; criteria and inspection methods are covered there and are not repeated here. The designer has two jobs only: state on the drawing that this array takes the plug-and-cap route, and state that mouth flatness is a controlled characteristic rather than leaving the fabricator to infer it.
A related constraint: continuous barrel plating is the precondition for the entire route. Plugging and capping both happen after the barrel is plated, so they cannot repair a barrel that plated badly in the first place. The harder the aspect ratio, the harder it is to keep barrel plating uniform, which is a constraint of through-hole and microvia plating itself.
5. When thermal vias stop being the right answer
Thermal vias solve vertical conduction inside a conventional FR-4 multilayer board. Their ceiling is set by that structure: heat has to cross dielectric layer after dielectric layer through a network of copper tubes, while the dielectric itself does not conduct. As device power density keeps climbing, adding more vias returns less and less, because the bottleneck has moved off the vias.
At that point the move is to change the substrate structure, not to keep adding holes:
- Metal core (aluminium or copper base): make the dielectric extremely thin so heat enters the metal base directly. This route does not rely on a via array at all, and the heat path is composed differently — the thermal resistance chain of a metal core board is a separate set of variables, and aluminium and copper bases have their own machining boundaries. Note that metal core constructions generally do not let through holes pass freely through the base, so the design constraints differ considerably from multilayer.
- Ceramic substrate: the base material conducts, so there is no need for copper tubes to route around a dielectric.
The intent difference versus /en/products/ceramic-pcb/ is worth stating plainly here, because searches for these two problems get mixed together constantly. This article answers "I am already on FR-4 multilayer, how should the vias under this pad be processed" — a process selection question inside an existing structure. The ceramic substrate page answers "should I switch base material" — a structural selection question. The first has three plugging routes as its answer; the second has a material systems comparison. If your bottleneck has shifted from "is the mouth flat" to "the dielectric itself is blocking the heat", read the second one; the answer is not further down this page. Likewise, the metal core product page and the resin-plugged via product page correspond to those two different exits.
6. What the drawing has to state
Most thermal via problems are not fabrication limits, they are unstated requirements. Omit any of the following and the fabricator can only apply its own default, and defaults differ between fabricators:
- The process route for this array. Open / back side tented / resin plug plus plated cap / conductive paste fill. Write it down; do not just draw a cluster of holes.
- The required mouth condition. If plugged, state that the mouth must finish flush with the pad and is a controlled characteristic. If open, state that through barrels are allowed and flag it to assembly.
- Which vias are thermal vias. The vias under the thermal pad have to be distinguishable from ordinary electrical vias in the same area, otherwise both get the same treatment.
- What the back side is for. Whether it mates to a heatsink or is an assembly surface determines whether protrusions or mask tenting are acceptable there.
- Surface finish. The surface finish on a thermal pad affects solder behaviour. Do not leave it blank.
- Do not state mutually exclusive requirements. Asking for fully open barrels for maximum conduction while also asking for a continuous void-free pad plane cannot both be satisfied; the designer has to decide which one to drop.
Put those six into the drawing or process note and the rest belongs to fabrication and quality verification. The structures that can actually be built are listed under manufacturing capabilities, and base material options under materials.
FAQ
Q1: Do vias under a thermal pad always have to be filled?
No. Open vias are usable, provided assembly knows they are open and has adjusted paste volume, stencil aperture and reflow profile. If the drawing is silent and assembly processes the board conventionally, solder wicks down the barrels and you get a starved joint under the pad, device tilt, or solder beads on the back side.
Q2: Does resin plugging conduct heat better than leaving vias open?
No. On the plug-and-cap route, conduction still happens through the plated barrel wall and the copper cap. The resin carries no thermal duty; it fills the hole so the mouth can be plated flat. The reason to choose that route is a flat solder interface, not improved conduction.
Q3: How should I choose among the three routes?
By which failure you can absorb. Open vias leave the risk at assembly. Resin plug plus cap moves it into fabrication's plugging and second plating operations. Conductive paste filling concentrates it in material behaviour and via-mouth consistency. All three can yield a usable board; they fail differently.
Q4: Does tenting the back side with solder mask count as filling?
No. It only seals one end of the capillary; the barrel stays hollow. It does reduce solder escaping to the back side, at the cost of making that side unsuitable for heatsink contact. Whether mask can fully close the mouth depends on hole size and must be confirmed with the fabricator rather than assumed.
Q5: Is adding more thermal vias always better?
No. In FR-4 multilayer, heat has to cross non-conducting dielectric through a copper tube network, so returns diminish past a point — the bottleneck is no longer the vias. Further improvement means changing structure: metal core thins the dielectric so heat enters the base directly, ceramic makes the base material itself conduct.
Q6: Can electrical and thermal vias follow the same rules?
No, and the drawing has to distinguish them. An electrical via only needs continuity; solder in the barrel and mouth flatness do not affect function. A via under a thermal pad directly governs joint geometry and voiding. Not distinguishing them means both get the same default treatment, and that default usually suits only electrical vias.
Related links
- quality system
- metal core PCB
- resin-plugged via PCB
- ceramic PCB
- aluminium MCPCB thermal management
- high thermal conductivity aluminium PCB resistance chain
- resin-filled via acceptance
- aluminium vs copper base machining
- laser microvia plating and aspect ratio
- solder joint failure causes
- surface finish comparison