Aluminum PCB Machining Limits: How Burrs, Cutting Heat and V-Scoring Threaten the Dielectric

The Problem Is Not in the Design Phase

Design discussion around aluminum PCBs almost always circles one topic: how thick the dielectric should be, how much thermal conductivity is needed, where the power devices go. Those are the right selection-stage questions, but all of them happen before manufacturing.

In actual delivery, a different failure mode is more common. The board arrives looking normal, electrical test passes, and then after some time in service — or inside the customer's hipot test or damp-heat cycling — insulation fails. Trace it back and the problem usually is not the designed dielectric thickness. It is what routing, drilling or V-scoring did to that layer.

The cause is structural. An aluminum PCB is a three-layer stack of copper foil, dielectric insulation and aluminum base, and the dielectric is typically the thinnest and most vulnerable layer on the board, sandwiched between a copper layer and a thick slab of metal. Any machining operation has to cut through all three materials, and a tool's behavior in aluminum is nothing like its behavior in woven-glass FR-4.

What makes it harder is how quiet the damage is. Most of it produces neither an open nor a short. A dielectric that has been compressed thinner, softened by cutting heat, or had a chip of aluminum pressed into it still shows correct netlist continuity, and standard test reports a pass. The failure waits for electrical field or environmental stress to reveal it.

> Division of labor with the product page: /en/products/aluminum-pcb answers whether this factory builds aluminum PCBs, within what range, and for which applications — a capability question. This article does not repeat that. It answers how an aluminum PCB gets damaged during machining and what the drawing has to state so that stage becomes verifiable — a manufacturing-risk and design-input question. Use them together: confirm range on the product page, then use this article to check your drawing for gaps.

1. Start With the Stack: It Determines Where the Risk Sits

Risk locations on an aluminum PCB are not random. The layer structure places them.

Top to bottom: copper foil (the pattern layer, carrying the circuit) → dielectric insulation layer (has to insulate and conduct heat at the same time, the performance bottleneck of the whole board and also its thinnest layer) → aluminum base (structure and heat spreading, most of the board thickness).

Two consequences follow, and they explain everything after this:

The tool spends most of its time cutting aluminum. The aluminum base dominates board thickness, so cutting behavior, heat generation and chip evacuation during routing and drilling are governed by aluminum, not by FR-4 experience.
The most fragile layer is in the middle and cannot be observed directly. Copper above, aluminum below. The compression, shear and heat it experiences during machining all happen out of sight. After routing you see a cut face, not the internal state of the interface.

The relevant manufacturing window published on SKPCB /en/capabilities/ reads: board thickness 0.2–6.0mm, maximum panel size 1250×570mm, mechanical drill minimum 0.15mm, hole position accuracy ±0.025mm; routing on a Schmoll CNC routing machine, drilling on a Hitachi high-speed drilling machine. Those are windows, not guarantees specific to aluminum substrate — the same machine needs a different parameter strategy on aluminum than on FR-4, which is what the rest of this article is about.

2. First Risk Class: Aluminum Ductility Produces Burrs and Built-Up Edge

Why FR-4 Experience Does Not Transfer

FR-4 is glass-reinforced thermoset. Under a cutting tool it behaves close to brittle fracture: glass fibers get severed and debris leaves as powder. So the main nuisances in FR-4 machining are tool wear and dust, not burrs.

Aluminum is the opposite. Aluminum is a ductile metal; it does not fracture immediately under tool load, it deforms plastically first. Two consequences:

Burrs. On the side where the tool exits the material, aluminum gets pushed and stretched instead of cut, forming a rolled-over metal edge at the board edge or hole mouth. This is the default outcome of machining aluminum, not an anomaly.
Built-up edge (tool adhesion). At cutting temperature, aluminum chips adhere to the cutting edge and form a built-up edge. That changes the effective tool geometry, so cutting force rises, heat rises and surface quality degrades — and it is a positive feedback loop: more adhesion, more heat; more heat, more adhesion.

What Burrs and Built-Up Edge Actually Cost

The dimensional size of a burr is the surface symptom. The real costs are three:

A board-edge burr is conductive, and its direction is not controlled. It is an extension of the aluminum base itself. If it rolls toward the copper side, it creates a gap between aluminum base and copper pattern that is much shorter than the designed path. /en/tolerance/ requires outer copper ≥0.005" and inner copper ≥0.010" from the board edge — and the meaning of that design clearance rests on the assumption that the board edge is a clean cut face.
A hole-mouth burr compresses the dielectric at the barrel. When the burr forms at the hole mouth, the force is directed inward, and the dielectric thins at that location.
The extra heat from built-up edge all goes into the workpiece. That is the next section.

Deburring is a standard operation, but understand its limit: deburring addresses a burr that already exists. It cannot undo the compression the dielectric already took while that burr was forming. So burr control is about reducing formation, not only about removal afterwards.

3. Second Risk Class: Cutting Heat Is the Main Threat to the Dielectric

This is the largest difference from FR-4, and the one most often underestimated.

Both the Generation and the Destination of Heat Differ

Cutting heat appears in any material. The difference is where it goes.

FR-4 conducts heat poorly, so cutting heat stays near the cut zone and leaves with the debris, with limited effect on distant material. An aluminum PCB is a metal-base board, and the whole base is an excellent thermal conductor — which is exactly why it was chosen. So cutting heat does not stay at the cut zone; it spreads laterally through the aluminum base.

That produces a counterintuitive conclusion: the excellent thermal conductivity of an aluminum PCB becomes, during machining, the channel that delivers heat to the dielectric layer. The thermal advantage and the machining risk come from the same physical property.

Why the Dielectric Is Temperature Sensitive

The dielectric insulation layer is an organic system, typically a filled resin. It has a glass transition temperature and it ages thermally. Raise the temperature and it softens; compress it while softened and the thickness change is irreversible.

Three things happen at once:

Softening plus pressure equals permanent thinning. During machining both the radial tool force and the burr compression force act on it. Pressure the dielectric would take elastically at room temperature becomes plastic deformation when softened.
Localized thermal aging. Extended time at elevated temperature degrades the crosslink structure and filler interfaces of a resin system, lowering dielectric strength.
Interface stress. Aluminum, resin and copper have different coefficients of thermal expansion. Local heating followed by cooling leaves residual stress at the interface, which is a starting point for later delamination.

Why None of It Is Visible

All three changes occur inside the dielectric or at an interface, and none of them alters the connectivity state of the circuit. After routing the board looks normal and netlist test passes. The drop in dielectric strength only shows up once a field is applied (hipot test, powered operation) or environmental stress intervenes (damp heat, thermal cycling).

This is the pattern that recurs in aluminum PCB failure analysis: damage created in manufacturing, discovered in service.

4. Third Risk Class: V-Scoring and Drilling Load the Interface Differently

Routing, V-scoring and drilling are all machining, but the way each loads the aluminum–dielectric–copper interface is different, and they have to be treated separately.

V-Scoring: Sustained Lateral Shear

V-scoring cuts a V-groove with a form cutter and leaves a remaining web for later break-out. On aluminum this has two distinctive features:

The tool travels a long straight line through aluminum. Heat input is linear and sustained along the entire score line, not a point.
The remaining web has to be broken, and aluminum does not break brittlely. A V-scored FR-4 panel snaps along the groove with light force. Aluminum, being ductile, prefers to bend first and then tear. The bending force during break-out acts directly on the aluminum-to-dielectric interface near the score line, which is the most direct test of interface bond strength on the whole board.

/en/tolerance/ states the scoring tolerance as location ±0.003", depth ±0.005", and explicitly notes that the center of the score line is the board edge, so copper clearance must be planned accordingly. On aluminum, that clearance additionally has to account for the zone affected by break-out forces — the break does not occur along a mathematical line.

Drilling: Point Heat Input Plus a Chip Evacuation Problem

Drilling concentrates load at a point, with two aluminum-specific complications:

The evacuation path is long and clogs easily. Aluminum chips are long ductile curls, not powder. They do not leave the hole readily, and once the flutes pack, cutting heat cannot leave with the chips and goes into the hole wall — which is exactly where the dielectric is exposed in cross-section.
The hole wall exposes all three materials. Copper, dielectric and aluminum appear in sequence on the barrel wall. Aluminum chips scrape along that wall as they evacuate and can press metal debris into the exposed dielectric face. This is one common physical origin of insufficient hole-wall insulation distance on aluminum PCBs — not a miscalculated design clearance but machining residue.

Routing: The Consequences of an Exposed Aluminum Edge

The board edge left by routing is bare metal aluminum. Two downstream requirements follow:

Corrosion protection and finishing. A bare aluminum face oxidizes. If the service environment has moisture or corrosive media, downstream protection has to be considered (anodizing, coating). That is a design and application decision and must be stated on the drawing; do not assume the factory will do it.
Electrical clearance on the assembly side. A bare aluminum edge is conductive. Its spacing to the chassis, heatsink or other metal parts must be treated as conductor clearance. This gets overlooked in design review because on the drawing the board edge is just an outline.

The board outline tolerance on /en/tolerance/ reads ±0.005" (≈0.13mm). Note that this is a dimensional tolerance describing outline position accuracy. It says nothing about cut-face quality — burr condition, edge roughness and bare-aluminum treatment are separate fields, and a field not written is a field not constrained.

5. Why Standard Electrical Test Cannot See This Damage

This section explains the quietness mentioned above, because it determines that the acceptance method has to change.

The electrical test scope stated on SKPCB /en/quality/ reads: netlist continuity and insulation resistance — flying probe for prototypes, dedicated fixtures for volume (equipment: ATG flying probe). That is a standard and necessary test, but understand what it measures and what it does not.

Netlist continuity checks whether designed nets conduct and whether nets that should not conduct are separated. A dielectric compressed to half thickness but still insulating: pass.
Insulation resistance checks resistance between nets at the test voltage. It will find a leakage path that has already formed, but it cannot tell you how much dielectric strength margin has been consumed. A dielectric layer that has been softened, thinned and has metal debris pressed into it can read entirely normal at low voltage.

That is a consequence of test principle, not of insufficient rigor. Standard electrical test is a functional test, while machining damage affects margin. Reduced margin does not change present function, it changes time to failure.

So the useful verification methods for aluminum PCBs are a different class:

AOI and visual inspection cover burr, board-edge and hole-mouth condition (/en/capabilities/ lists Orbotech AOI). This is the most direct way to check whether burrs formed.
Microsectioning is the only method that directly shows dielectric thickness and interface condition. It is destructive and sampled, but for hole walls and V-groove roots on aluminum there is no substitute.
Hipot testing measures dielectric strength margin directly rather than reading a resistance value. Whether it runs and under what conditions is something that must be agreed on the drawing or specification — unstated means not performed by default.

In one line: machining damage on aluminum PCBs has to be looked for with methods aimed at interfaces and margin; a continuity test will not find it for you.

6. Seven Items That Must Be Explicit on the Drawing

Everything above lands here. If these seven are not written, the factory will process to the default rules for general laminate, and the default rules for aluminum do not automatically hold.

Aluminum substrate grade or model, or an equivalence statement. Different aluminum PCB products use different dielectric systems with different machining windows.
Burr and deburring requirements at board edges and hole mouths, plus whether edge chamfering is acceptable. Writing only "deburr" says nothing — state which locations and against what acceptance basis.
Treatment requirement for the bare aluminum edge: whether corrosion protection is needed, by what method, and whether bare aluminum at the edge is acceptable at all.
Copper-to-edge and copper-to-score-line clearance. The general basis on /en/tolerance/ is outer copper ≥0.005" and inner copper ≥0.010" from the board edge. If the application needs greater electrical clearance because the aluminum edge is a conductor, state it explicitly rather than relying on the default.
Whether V-scoring is required and on what terms: remaining web requirement, depanelization method (manual break versus machine depaneling). Aluminum breaks differently from FR-4, so the method should be specified.
Hipot test requirement and conditions: whether it runs, where it is applied (copper to aluminum base, copper to copper), and under what conditions. This is the final verification for every risk in this article; unstated means it does not run.
Microsection sampling requirement: whether it is needed and where samples are taken. Hole walls and V-groove roots are the two most complex load locations and are the suggested coverage.

What these seven share is that none of them describes a dimension; they describe process constraints and acceptance method. Drawings are habitually built to record dimensions, so these are the easiest items to omit. The result of omitting them is not that the factory does it wrong, but that the factory does it to its own default, and that default may not match your application.

7. If the Design Can Change: Three Directions That Lower Machining Risk

Machining risk can also be reduced from the design side, not only controlled in process.

Remove unnecessary internal slots and irregular contours. Every segment of internal contour is another cutting heat input and another bare aluminum edge. Simpler geometry means fewer heat inputs and fewer loaded interface locations.
Ship as individual boards instead of V-scored arrays where that is acceptable. This removes the entire break-out load risk class. The cost is assembly-side efficiency, so it is a tradeoff.
Allow more copper clearance to board edges and score lines than the minimum. This is the cheapest item on the list: it adds no operation, it only gives up a little space at layout time, and it covers burrs, cut-face deviation and break-out load zone all at once.

FAQ

Q: Is a burr on an aluminum PCB a process defect?

A: Burr formation is inherent behavior when a ductile metal like aluminum is cut, not an anomaly. What can legitimately be called a defect is a burr that was not handled per agreement, or a burr that has already caused a consequence (compressed dielectric, reduced actual electrical clearance). So what belongs on the drawing is a deburring requirement and acceptance basis, not an unachievable statement like "no burrs permitted."

Q: Why is heat a concern when machining aluminum PCBs if they are good at dissipating heat?

A: Precisely because they are. Good thermal conductivity means heat generated at the cut zone conducts quickly through the base, and that conduction path passes through the dielectric insulation layer. The thermal advantage and the machining heat risk come from the same physical property. FR-4 conducts poorly and keeps heat near the cut; an aluminum base delivers it where you do not want it.

Q: Electrical test passed. Does that mean the dielectric was not damaged during machining?

A: That inference does not hold. The electrical test on /en/quality/ covers netlist continuity and insulation resistance, which verify present functional state. A dielectric that has been thinned, softened or has debris pressed into it can still read normal resistance at test voltage while its dielectric strength margin has dropped. To confirm margin you need hipot testing; to see the dielectric condition directly you need a microsection.

Q: Can V-scoring be done on aluminum PCBs?

A: Yes, and the scoring tolerance basis on /en/tolerance/ (location ±0.003", depth ±0.005") applies. Two additional cautions: aluminum does not break brittlely, so bending force at break-out acts on the interface near the score line; and the center of the score line is the board edge, so copper-to-score-line distance has to be treated as conductor clearance because the groove root and both flanks expose aluminum. If the application is sensitive to insulation margin, prefer shipping individual boards.

Q: Insufficient hole-wall insulation distance — is that a design problem or a machining problem?

A: It can be either and the two have to be separated. On the design side, whether hole-to-copper and hole-to-aluminum clearances were calculated adequately. On the machining side, whether evacuating chips scraped and pressed debris into the exposed dielectric face and whether hole-mouth burrs compressed the barrel wall. The latter is invisible in drawing dimensions and can only be confirmed by hole-wall inspection or microsection. So when this shows up, use a microsection first to determine whether it is inadequate clearance or machining residue, then decide whether to change the design or the process.

Q: Do these risks make aluminum PCBs unsuitable?

A: No. They are controllable operations, not impassable limits. The point of this article is to move this stage from "the factory handles it by default" to "the drawing states it explicitly and acceptance evidence exists." The difference is not whether the factory can do it, but whether your specific requirement reached the work order.