Everyone knows the 4-layer layer assignment: signal, ground, power, signal. Once the fab has that table, it still has to decide something else: which materials those four copper layers are pressed from. There are two common answers, foil construction and core construction. The finished boards look identical, but each dielectric gap comes from a different source, so dielectric tolerance, impedance stability and available copper weights differ too.
For how to assign the layers, see 4 vs 6 vs 8 layer comparison. This article covers construction only.
The two constructions side by side
| Item | Foil construction | Core construction |
|---|---|---|
| Materials | 1 core (L2/L3) + prepreg each side + outer copper foil | 2 cores (L1/L2, L3/L4) + prepreg in the middle |
| L1–L2 and L3–L4 dielectric | Prepreg, thickness after pressing | Core, as-supplied thickness |
| L2–L3 dielectric | Core, as-supplied thickness | Prepreg, thickness after pressing |
| Outer copper source | Separately chosen foil | Cladding that comes with the core |
| Layers imaged before pressing | L2, L3 | L2, L3 (one on each core) |
| Lamination cycles | 1 | 1 |
| How common | The default 4-layer build | Used when there is a specific reason |
Foil construction: prepreg sets the outer dielectric
In a foil build, L2 and L3 sit on one core. Prepreg goes on each side, outer copper foil on top, and the stack is pressed once.
The key point: pressed prepreg thickness is not a fixed number. Resin flows into the gaps between L2 and L3 features. The lower the inner-layer copper coverage, the more resin is consumed and the thinner the remaining dielectric. So the L1–L2 and L3–L4 gaps depend on how copper is distributed on the inner layers.
- If L2 is a solid ground and L3 is a sparse signal layer, the two sides fill differently and the top and bottom outer dielectrics end up different.
- That gap is exactly the reference distance for outer-layer microstrip, so it shows up directly in L1 and L4 impedance.
- The benefit: outer copper foil can be chosen independently of core cladding.
Core construction: the core sets the outer dielectric
A core build uses two cores. L1/L2 are on one, L3/L4 on the other, and prepreg bonds L2 to L3.
- The L1–L2 and L3–L4 dielectrics are core material. Their thickness is the as-supplied value, unaffected by resin fill, so the outer microstrip reference distance is more stable.
- The variable moves to L2–L3, where the prepreg must fill both L2 and L3 patterns. That gap is usually ground-to-power, which matters less for signal impedance.
- Outer copper can only be the core cladding, so copper weight options are limited by core availability. See core and prepreg availability constraints.
Impedance: which gap matters more
On a 4-layer board the controlled-impedance traces are usually outer-layer microstrip, referenced across L1–L2 and L3–L4.
- In a foil build, that gap is prepreg and depends on inner copper coverage. The fab estimates pressed thickness from the copper distribution, then back-calculates trace width.
- In a core build, that gap is core, and the only variation left is the supplier tolerance.
- Both constructions can hold impedance. SKPCB standard impedance tolerance is ±10%; ±5% requires engineering review, and that review covers the construction choice too. See impedance tolerance classes.
Symmetry and warpage
Both constructions are materially symmetric top to bottom. Real warpage risk comes from copper distribution:
- In a foil build, a large coverage difference between L2 and L3 means uneven resin fill, so pressed dielectric and stress are asymmetric.
- In a core build, a large coverage difference between the L1/L2 and L3/L4 cores introduces the same asymmetry.
- The fix is the same: copper thieving and balanced coverage. See multilayer copper balance and warpage control.
Stackup table: specify the construction, or the intent?
| What you send | When it fits | Risk |
|---|---|---|
| Finished thickness, outer/inner copper, impedance targets only | Most 4-layer boards | The fab defaults to foil build and back-calculates dielectrics from impedance |
| Target dielectric per gap + impedance targets | Impedance-controlled, simulation already run on a given dielectric set | Thickness and impedance must both be achievable, or the fab raises an EQ asking which wins |
| Construction (foil/core) + specific core thickness | Outer dielectric must be locked, or the customer has qualified one build | Narrower material choice, availability and cost affected |
Recommendation: unless there is a hard reason, send intent (thickness, copper, impedance targets, which layers are reference planes) and let the fab choose the construction and return a stackup for approval. If you do lock the construction, state the type and the reason on the stackup table so the fab does not revert to a default foil build.
Freeze before release
- Finished thickness and tolerance (SKPCB range 0.2–6.0 mm); how it accumulates is covered in finished thickness tolerance control
- Copper weight per layer, with outer layers marked as base or finished copper
- Impedance layers, reference layers, targets and tolerance
- Whether the fab may choose the construction; if not, the type and the reason
- Whether inner copper is already balanced, or whether the fab may add thieving
- Stackup approval loop: production starts after the fab's stackup drawing is signed back
Summary
Choosing foil or core construction for a 4-layer board is really choosing which dielectric gap is fixed by supplied material and which is set by pressing. For stable outer microstrip, core build is the direct route; for flexible outer copper, foil build is the default. Most projects should send intent and approve the fab's stackup; only lock the construction when the outer dielectric truly must not move. Check capability on the multilayer PCB page or submit a stackup for review via the quote page.
FAQ
Q: Can you tell a foil build from a core build by looking at the board?
A: No. Appearance, layer count and thickness are the same. The difference is only visible in cross-section: whether each gap is core or prepreg.
Q: Which construction is more common?
A: Foil construction is the default for 4-layer boards: one core carries L2/L3, outer layers are foil, and outer copper weight can be chosen freely.
Q: Which should I choose for tight outer-layer impedance?
A: Core construction, because the outer dielectric is as-supplied core and is not affected by resin fill. Foil builds can hold impedance too; the fab predicts pressed thickness from inner copper coverage.
Q: Must the stackup table state the construction type?
A: No. Most projects only need thickness, copper, impedance targets and reference layers, with the fab returning a stackup for approval. Specify construction only when the outer dielectric must be locked.
Q: What impedance tolerance does SKPCB hold?
A: ±10% standard; ±5% requires engineering review, which also confirms construction and dielectrics.
Q: Do both constructions need inner copper balancing?
A: Yes. Warpage risk comes mainly from asymmetric copper distribution, regardless of construction.